NXP Flash MCU to Atmel Flash MCU Cross Reference. 07/01/ 86KB. NXP Flash MCU to Atmel Flash MCU Devices, Non-Direct Replacements. 07/01/ The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and. 89C55 datasheet, 89C55 circuit, 89C55 data sheet: ATMEL – 8-Bit Microcontroller with 20K Bytes Flash,alldatasheet, datasheet, Datasheet search site for.

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Port 3 also serves the functions of various special features 895c5 the AT89C55, as shown in the following table. Port 0 also receives the code bytes during Flash program- ming and outputs the code bytes during program verifica- tion.

As an output port, each pin can sink eight TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs.

89C55 Datasheet pdf – 8-Bit Microcontroller with 20K Bytes Flash – Atmel

As inputs, Port 1 pins that are externally being pulled low will source current I. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs.

Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Read accesses to these addresses will in general return random data, and write accesses will have an indetermi- nate effect. RXD serial input port. T0 timer 0 external input.

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Note, however, that one ALE pulse is skipped during each access to external data mem- ory. Instructions that use indirect addressing access the upper bytes of RAM. Interrupt Registers The individual interrupt enable bits are in the IE register.

Port 3 also receives the highest-order address bit and some control signals for Flash programming and verifica- tion. Two priorities can be set for each of the six interrupt sources in the IP register.

T1 timer 1 external input. This pin also receives the volt programming enable volt- age V. As inputs, Port 3 pins that are externally being pulled low will source current I. User software should not write 1s to these unlisted loca- tions, since they may be used in ztmel products to invoke new features.

INT1 external interrupt 1. TXD serial output port. In this mode, P0 has internal pul- lups.

INT0 external interrupt 0. WR external data memory write strobe. Otherwise, the pin is weakly pulled high. In this application, Port 2 uses strong internal pul- lups when emitting 1s. The AT89C55 provides the following standard features: The low-voltage option saves power and operates with a 2.

At89c55-24jc Atmel IC Microcontroller 8-bit 44 Pin PLCC MCU 89c55-24jc

Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented on the chip. In that case, the reset or inactive values of the new bits will always be 0. External pullups are required during program verifica- tion. The device is manu- factured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and pinout.

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As inputs, Port 2 pins that are externally being pulled low will source current I. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 whose address is 0A0H.

89C55 Datasheet(PDF) – ATMEL Corporation

Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. Three-Level Program Memory Lock. RD external data memory read strobe. Instructions that use direct addressing access SFR space. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

The Power Down Mode saves the RAM con- tents atkel freezes the oscillator, disabling all other chip func- tions until the next hardware reset. Note that stack operations are examples of indirect addressing, so the upper bytes of data RAM are avail- able as stack space. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

The upper bytes occupy a parallel address space to the Special Function Registers.

Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use bit addresses MOVX DPTR. EA should be strapped to V. A high on this pin for two machine cycles while the oscillator is running resets the device.